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            "width": 16,
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                "role": "GEM5 RESPONDER",
                "peer": [
                    "system.system_port",
                    "system.cpu.icache_port",
                    "system.cpu.dcache_port",
                    "system.cpu.mmu.itb_walker.port",
                    "system.cpu.mmu.dtb_walker.port",
                    "system.cpu.mmu.stage2_itb_walker.port",
                    "system.cpu.mmu.stage2_dtb_walker.port"
                ],
                "is_source": "False"
            },
            "mem_side_ports": {
                "role": "GEM5 REQUESTOR",
                "peer": [
                    "system.mem_ctrls.port"
                ],
                "is_source": "True"
            }
        },
        "voltage_domain": {
            "type": "VoltageDomain",
            "cxx_class": "gem5::VoltageDomain",
            "name": "voltage_domain",
            "path": "system.voltage_domain",
            "eventq_index": 0,
            "voltage": [
                1.0
            ]
        },
        "system_port": {
            "role": "GEM5 REQUESTOR",
            "peer": "system.membus.cpu_side_ports[0]",
            "is_source": "True"
        }
    }
}