From 28d823c05ecd6fb62711d3a4b207f770297352a5 Mon Sep 17 00:00:00 2001 From: Carlos Gutierrez Date: Sun, 5 Oct 2025 00:33:12 -0400 Subject: [PATCH] updating --- scripts/simple_config.py | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/scripts/simple_config.py b/scripts/simple_config.py index c8606b3..dac072a 100644 --- a/scripts/simple_config.py +++ b/scripts/simple_config.py @@ -45,12 +45,7 @@ system.mem_ctrl.port = system.membus.mem_side_ports system.system_port = system.membus.cpu_side_ports # Create workload -process = Process() -process.executable = args.cmd -process.cmd = [args.cmd] - -# Assign workload to CPU -system.cpu.workload = process +system.cpu.workload = SEWorkload.init_compatible(args.cmd) system.cpu.createThreads() # Create root and run simulation