diff --git a/logs/env.txt b/logs/env.txt index 689fd66..8538daa 100644 --- a/logs/env.txt +++ b/logs/env.txt @@ -3,197 +3,35 @@ ROOT=/home/carlos/projects/gem5 SRC=/home/carlos/projects/gem5/gem5src/gem5 GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/scripts/11_hetero_big_little.py +CFG=/home/carlos/projects/gem5/gem5src/gem5/configs/example/arm/starter_se.py RUN=/home/carlos/projects/gem5/gem5-run OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:36:33 AM UTC 2025 +Sun Oct 5 03:21:03 AM UTC 2025 ==== env ==== ROOT=/home/carlos/projects/gem5 SRC=/home/carlos/projects/gem5/gem5src/gem5 GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py +CFG=/home/carlos/projects/gem5/gem5src/gem5/configs/example/arm/starter_se.py RUN=/home/carlos/projects/gem5/gem5-run OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:50:44 AM UTC 2025 +Sun Oct 5 03:21:08 AM UTC 2025 ==== env ==== ROOT=/home/carlos/projects/gem5 SRC=/home/carlos/projects/gem5/gem5src/gem5 GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py +CFG=/home/carlos/projects/gem5/gem5src/gem5/configs/example/arm/starter_se.py RUN=/home/carlos/projects/gem5/gem5-run OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:51:22 AM UTC 2025 +Sun Oct 5 03:22:27 AM UTC 2025 ==== env ==== ROOT=/home/carlos/projects/gem5 SRC=/home/carlos/projects/gem5/gem5src/gem5 GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py +CFG=/home/carlos/projects/gem5/gem5src/gem5/configs/example/arm/starter_se.py RUN=/home/carlos/projects/gem5/gem5-run OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:51:37 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:52:04 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:52:04 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:52:28 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:53:39 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:53:47 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:53:53 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:53:53 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:54:08 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:58:46 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:58:52 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:59:13 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:59:13 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 02:59:17 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 03:02:57 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 03:03:01 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 03:10:44 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 03:10:50 AM UTC 2025 -==== env ==== -ROOT=/home/carlos/projects/gem5 -SRC=/home/carlos/projects/gem5/gem5src/gem5 -GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt -CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py -RUN=/home/carlos/projects/gem5/gem5-run -OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results -LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs -Sun Oct 5 03:13:09 AM UTC 2025 +Sun Oct 5 03:26:32 AM UTC 2025 diff --git a/m5out_control/config.ini b/m5out_control/config.ini new file mode 100644 index 0000000..534f23e --- /dev/null +++ b/m5out_control/config.ini @@ -0,0 +1,553 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu cpu_clk_domain cpu_voltage_domain dvfs_handler mem_ctrls membus redirect_paths0 redirect_paths1 redirect_paths2 voltage_domain workload +auto_unlink_shared_backstore=false +cache_line_size=64 +eventq_index=0 +exit_on_work_items=false +init_param=0 +m5ops_base=0 +mem_mode=atomic +mem_ranges=0:536870912 +memories=system.mem_ctrls.dram +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +readfile= +redirect_paths=system.redirect_paths0 system.redirect_paths1 system.redirect_paths2 +shadow_rom_ranges= +shared_backstore= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +workload=system.workload +system_port=system.membus.cpu_side_ports[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=BaseAtomicSimpleCPU +children=decoder interrupts isa mmu power_state tracer workload +branchPred=Null +checker=Null +clk_domain=system.cpu_clk_domain +cpu_id=0 +decoder=system.cpu.decoder +do_checkpoint_insts=true +do_statistics_insts=true +eventq_index=0 +function_trace=false +function_trace_start=0 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +max_insts_all_threads=0 +max_insts_any_thread=0 +mmu=system.cpu.mmu +numThreads=1 +power_gating_on_idle=false +power_model= +power_state=system.cpu.power_state +progress_interval=0 +pwr_gating_latency=300 +simpoint_start_insts= +simulate_data_stalls=false +simulate_inst_stalls=false +socket_id=0 +switched_out=false +syscallRetryLatency=10000 +system=system +tracer=system.cpu.tracer +width=1 +workload=system.cpu.workload +dcache_port=system.membus.cpu_side_ports[2] +icache_port=system.membus.cpu_side_ports[1] + +[system.cpu.decoder] +type=ArmDecoder +dvm_enabled=false +eventq_index=0 +isa=system.cpu.isa + +[system.cpu.interrupts] +type=ArmInterrupts +eventq_index=0 + +[system.cpu.isa] +type=ArmISA +children=release_se +decoderFlavor=Generic +eventq_index=0 +fpsid=1090793632 +id_aa64afr0_el1=0 +id_aa64afr1_el1=0 +id_aa64dfr0_el1=15790086 +id_aa64dfr1_el1=0 +id_aa64isar0_el1=268435456 +id_aa64isar1_el1=16846864 +id_aa64mmfr0_el1=15728642 +id_aa64mmfr1_el1=1052704 +id_aa64mmfr2_el1=65552 +id_isar0=34607377 +id_isar1=34677009 +id_isar2=555950401 +id_isar3=17899825 +id_isar4=268501314 +id_isar5=285212672 +id_isar6=1 +id_mmfr0=270536963 +id_mmfr1=0 +id_mmfr2=19070976 +id_mmfr3=34611729 +id_mmfr4=0 +impdef_nop=false +midr=0 +pmu=Null +release_se=system.cpu.isa.release_se +sme_vl_se=1 +sve_vl_se=1 +system=system + +[system.cpu.isa.release_se] +type=ArmRelease +eventq_index=0 +extensions=CRYPTO FEAT_LSE FEAT_RDM FEAT_F32MM FEAT_F64MM FEAT_SVE FEAT_I8MM FEAT_DOTPROD FEAT_FCMA FEAT_JSCVT FEAT_PAuth FEAT_FLAGM FEAT_FLAGM2 FEAT_SME TME + +[system.cpu.mmu] +type=ArmMMU +children=dtb dtb_walker itb itb_walker l2_shared stage2_dtb stage2_dtb_walker stage2_itb stage2_itb_walker +dtb=system.cpu.mmu.dtb +dtb_walker=system.cpu.mmu.dtb_walker +eventq_index=0 +itb=system.cpu.mmu.itb +itb_walker=system.cpu.mmu.itb_walker +release_se=system.cpu.isa.release_se +stage2_dtb=system.cpu.mmu.stage2_dtb +stage2_dtb_walker=system.cpu.mmu.stage2_dtb_walker +stage2_itb=system.cpu.mmu.stage2_itb +stage2_itb_walker=system.cpu.mmu.stage2_itb_walker +sys=system + +[system.cpu.mmu.dtb] +type=ArmTLB +entry_type=data +eventq_index=0 +is_stage2=false +next_level=system.cpu.mmu.l2_shared +partial_levels= +size=64 +sys=system + +[system.cpu.mmu.dtb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_clk_domain +eventq_index=0 +is_stage2=false +num_squash_per_cycle=2 +power_model= +power_state=system.cpu.mmu.dtb_walker.power_state +sys=system +port=system.membus.cpu_side_ports[4] + +[system.cpu.mmu.dtb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu.mmu.itb] +type=ArmTLB +entry_type=instruction +eventq_index=0 +is_stage2=false +next_level=system.cpu.mmu.l2_shared +partial_levels= +size=64 +sys=system + +[system.cpu.mmu.itb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_clk_domain +eventq_index=0 +is_stage2=false +num_squash_per_cycle=2 +power_model= +power_state=system.cpu.mmu.itb_walker.power_state +sys=system +port=system.membus.cpu_side_ports[3] + +[system.cpu.mmu.itb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu.mmu.l2_shared] +type=ArmTLB +entry_type=unified +eventq_index=0 +is_stage2=false +next_level=Null +partial_levels=L2 +size=1280 +sys=system + +[system.cpu.mmu.stage2_dtb] +type=ArmTLB +entry_type=data +eventq_index=0 +is_stage2=true +next_level=Null +partial_levels= +size=32 +sys=system + +[system.cpu.mmu.stage2_dtb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_clk_domain +eventq_index=0 +is_stage2=true +num_squash_per_cycle=2 +power_model= +power_state=system.cpu.mmu.stage2_dtb_walker.power_state +sys=system +port=system.membus.cpu_side_ports[6] + +[system.cpu.mmu.stage2_dtb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu.mmu.stage2_itb] +type=ArmTLB +entry_type=instruction +eventq_index=0 +is_stage2=true +next_level=Null +partial_levels= +size=32 +sys=system + +[system.cpu.mmu.stage2_itb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_clk_domain +eventq_index=0 +is_stage2=true +num_squash_per_cycle=2 +power_model= +power_state=system.cpu.mmu.stage2_itb_walker.power_state +sys=system +port=system.membus.cpu_side_ports[5] + +[system.cpu.mmu.stage2_itb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states=ON CLK_GATED OFF + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=/home/carlos/projects/gem5/gem5-run/tinyml_kws +cwd=/home/carlos/projects/gem5/iot +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/carlos/projects/gem5/gem5-run/tinyml_kws +gid=1000 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +release=5.1.0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.cpu_voltage_domain + +[system.cpu_voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.0 + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.mem_ctrls] +type=MemCtrl +children=dram power_state +clk_domain=system.clk_domain +command_window=10000 +disable_sanity_check=false +dram=system.mem_ctrls.dram +eventq_index=0 +mem_sched_policy=frfcfs +min_reads_per_switch=16 +min_writes_per_switch=16 +power_model= +power_state=system.mem_ctrls.power_state +qos_policy=Null +qos_priorities=1 +qos_priority_escalation=false +qos_q_policy=fifo +qos_requestors= +qos_syncro_scheduler=false +qos_turnaround_policy=Null +static_backend_latency=10000 +static_frontend_latency=10000 +system=system +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.membus.mem_side_ports[0] + +[system.mem_ctrls.dram] +type=DRAMInterface +children=power_state +IDD0=0.055 +IDD02=0.0 +IDD2N=0.032 +IDD2N2=0.0 +IDD2P0=0.0 +IDD2P02=0.0 +IDD2P1=0.032 +IDD2P12=0.0 +IDD3N=0.038 +IDD3N2=0.0 +IDD3P0=0.0 +IDD3P02=0.0 +IDD3P1=0.038 +IDD3P12=0.0 +IDD4R=0.157 +IDD4R2=0.0 +IDD4W=0.125 +IDD4W2=0.0 +IDD5=0.23500000000000001 +IDD52=0.0 +IDD6=0.02 +IDD62=0.0 +VDD=1.5 +VDD2=0.0 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +beats_per_clock=2 +burst_length=8 +clk_domain=system.clk_domain +conf_table_reported=true +data_clock_sync=false +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +enable_dram_powerdown=false +eventq_index=0 +image_file= +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +null=false +page_policy=open_adaptive +power_model= +power_state=system.mem_ctrls.dram.power_state +range=0:536870912 +ranks_per_channel=2 +read_buffer_size=32 +tAAD=1250 +tBURST=5000 +tBURST_MAX=5000 +tBURST_MIN=5000 +tCCD_L=0 +tCCD_L_WR=0 +tCK=1250 +tCL=13750 +tCS=2500 +tCWL=13750 +tPPD=0 +tRAS=35000 +tRCD=13750 +tRCD_WR=13750 +tREFI=7800000 +tRFC=260000 +tRP=13750 +tRRD=6000 +tRRD_L=0 +tRTP=7500 +tRTW=2500 +tWR=15000 +tWTR=7500 +tWTR_L=7500 +tXAW=30000 +tXP=6000 +tXPDLL=0 +tXS=270000 +tXSDLL=0 +two_cycle_activate=false +write_buffer_size=64 +writeable=true + +[system.mem_ctrls.dram.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.mem_ctrls.power_state] +type=PowerState +clk_gate_bins=20 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+ "peer": "system.membus.mem_side_ports[0]", + "is_source": "False" + } + } + ], + "membus": { + "type": "CoherentXBar", + "cxx_class": "gem5::CoherentXBar", + "name": "membus", + "path": "system.membus", + "clk_domain": "system.clk_domain", + "eventq_index": 0, + "forward_latency": 4, + "frontend_latency": 3, + "header_latency": 1, + "max_outstanding_snoops": 512, + "max_routing_table_size": 512, + "point_of_coherency": true, + "point_of_unification": true, + "power_model": [], + "power_state": { + "type": "PowerState", + "cxx_class": "gem5::PowerState", + "name": "power_state", + "path": "system.membus.power_state", + "clk_gate_bins": 20, + "clk_gate_max": 1000000000000, + "clk_gate_min": 1000, + "default_state": "UNDEFINED", + "eventq_index": 0, + "leaders": [], + "possible_states": [] + }, + "response_latency": 2, + "snoop_filter": { + "type": "SnoopFilter", + "cxx_class": "gem5::SnoopFilter", + "name": "snoop_filter", + "path": "system.membus.snoop_filter", + "eventq_index": 0, + "lookup_latency": 1, + "max_capacity": 8388608, + "system": "system" + }, + "snoop_response_latency": 4, + "system": "system", + "use_default_range": false, + "width": 16, + "cpu_side_ports": { + "role": "GEM5 RESPONDER", + "peer": [ + "system.system_port", + "system.cpu.icache_port", + "system.cpu.dcache_port", + "system.cpu.mmu.itb_walker.port", + "system.cpu.mmu.dtb_walker.port", + "system.cpu.mmu.stage2_itb_walker.port", + "system.cpu.mmu.stage2_dtb_walker.port" + ], + "is_source": "False" + }, + "mem_side_ports": { + "role": "GEM5 REQUESTOR", + "peer": [ + "system.mem_ctrls.port" + ], + "is_source": "True" + } + }, + "voltage_domain": { + "type": "VoltageDomain", + "cxx_class": "gem5::VoltageDomain", + "name": "voltage_domain", + "path": "system.voltage_domain", + "eventq_index": 0, + "voltage": [ + 1.0 + ] + }, + "system_port": { + "role": "GEM5 REQUESTOR", + "peer": "system.membus.cpu_side_ports[0]", + "is_source": "True" + } + } +} \ No newline at end of file diff --git a/m5out_control/fs/proc/cpuinfo b/m5out_control/fs/proc/cpuinfo new file mode 100644 index 0000000..d42c6c9 --- /dev/null +++ b/m5out_control/fs/proc/cpuinfo @@ -0,0 +1,19 @@ +processor : 0 +vendor_id : Generic +cpu family : 0 +model : 0 +model name : Generic +stepping : 0 +cpu MHz : 2000.000 +cache size: : 2048.0K +physical id : 0 +siblings : 1 +core id : 0 +cpu cores : 1 +fpu : yes +fpu exception : yes +cpuid level : 1 +wp : yes +flags : fpu +cache alignment : 64 + diff --git a/m5out_control/fs/proc/stat b/m5out_control/fs/proc/stat new file mode 100644 index 0000000..455c3a5 --- /dev/null +++ b/m5out_control/fs/proc/stat @@ -0,0 +1,2 @@ +cpu 0 0 0 0 0 0 0 +cpu0 0 0 0 0 0 0 0 diff --git a/m5out_control/fs/sys/devices/system/cpu/online b/m5out_control/fs/sys/devices/system/cpu/online new file mode 100644 index 0000000..a63547a --- /dev/null +++ b/m5out_control/fs/sys/devices/system/cpu/online @@ -0,0 +1 @@ +0-0 \ No newline at end of file diff --git a/m5out_control/fs/sys/devices/system/cpu/possible b/m5out_control/fs/sys/devices/system/cpu/possible new file mode 100644 index 0000000..a63547a --- /dev/null +++ b/m5out_control/fs/sys/devices/system/cpu/possible @@ -0,0 +1 @@ +0-0 \ No newline at end of file diff --git a/m5out_control/stats.txt b/m5out_control/stats.txt new file mode 100644 index 0000000..e69de29 diff --git a/m5out_debug/config.ini b/m5out_debug/config.ini new file mode 100644 index 0000000..d7caa1d --- /dev/null +++ b/m5out_debug/config.ini @@ -0,0 +1,1681 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu_cluster dvfs_handler mem_ctrls0 mem_ctrls1 membus voltage_domain workload +auto_unlink_shared_backstore=false +cache_line_size=64 +eventq_index=0 +exit_on_work_items=false +init_param=0 +m5ops_base=0 +mem_mode=timing +mem_ranges=0:536870912 +memories=system.mem_ctrls0.dram system.mem_ctrls1.dram +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +readfile= +redirect_paths= +shadow_rom_ranges= +shared_backstore= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +workload=system.workload +system_port=system.membus.cpu_side_ports[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu_cluster] +type=CpuCluster +children=clk_domain cpus l2 toL2Bus voltage_domain +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +thermal_domain=Null +voltage_domain=system.cpu_cluster.voltage_domain + +[system.cpu_cluster.clk_domain] +type=SrcClockDomain +clock=250 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.cpu_cluster.voltage_domain + +[system.cpu_cluster.cpus] +type=BaseMinorCPU +children=branchPred dcache decoder executeFuncUnits icache interrupts isa mmu power_state tracer workload +branchPred=system.cpu_cluster.cpus.branchPred +checker=Null +clk_domain=system.cpu_cluster.clk_domain +cpu_id=0 +decodeCycleInput=true +decodeInputBufferSize=3 +decodeInputWidth=2 +decodeToExecuteForwardDelay=1 +decoder=system.cpu_cluster.cpus.decoder +do_checkpoint_insts=true +do_statistics_insts=true +enableIdling=true +eventq_index=0 +executeAllowEarlyMemoryIssue=true +executeBranchDelay=1 +executeCommitLimit=2 +executeCycleInput=true +executeFuncUnits=system.cpu_cluster.cpus.executeFuncUnits +executeInputBufferSize=7 +executeInputWidth=2 +executeIssueLimit=2 +executeLSQMaxStoreBufferStoresPerCycle=2 +executeLSQRequestsQueueSize=1 +executeLSQStoreBufferSize=5 +executeLSQTransfersQueueSize=2 +executeMaxAccessesInMemory=2 +executeMemoryCommitLimit=1 +executeMemoryIssueLimit=1 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itb itb_walker l2_shared stage2_dtb stage2_dtb_walker stage2_itb stage2_itb_walker +dtb=system.cpu_cluster.cpus.mmu.dtb +dtb_walker=system.cpu_cluster.cpus.mmu.dtb_walker +eventq_index=0 +itb=system.cpu_cluster.cpus.mmu.itb +itb_walker=system.cpu_cluster.cpus.mmu.itb_walker +release_se=system.cpu_cluster.cpus.isa.release_se +stage2_dtb=system.cpu_cluster.cpus.mmu.stage2_dtb +stage2_dtb_walker=system.cpu_cluster.cpus.mmu.stage2_dtb_walker +stage2_itb=system.cpu_cluster.cpus.mmu.stage2_itb +stage2_itb_walker=system.cpu_cluster.cpus.mmu.stage2_itb_walker +sys=system + +[system.cpu_cluster.cpus.mmu.dtb] +type=ArmTLB +entry_type=data +eventq_index=0 +is_stage2=false +next_level=system.cpu_cluster.cpus.mmu.l2_shared +partial_levels= +size=64 +sys=system + +[system.cpu_cluster.cpus.mmu.dtb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +is_stage2=false +num_squash_per_cycle=2 +power_model= +power_state=system.cpu_cluster.cpus.mmu.dtb_walker.power_state +sys=system +port=system.cpu_cluster.toL2Bus.cpu_side_ports[3] + +[system.cpu_cluster.cpus.mmu.dtb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.cpus.mmu.itb] +type=ArmTLB +entry_type=instruction +eventq_index=0 +is_stage2=false +next_level=system.cpu_cluster.cpus.mmu.l2_shared +partial_levels= +size=64 +sys=system + +[system.cpu_cluster.cpus.mmu.itb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +is_stage2=false +num_squash_per_cycle=2 +power_model= +power_state=system.cpu_cluster.cpus.mmu.itb_walker.power_state +sys=system +port=system.cpu_cluster.toL2Bus.cpu_side_ports[2] + +[system.cpu_cluster.cpus.mmu.itb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.cpus.mmu.l2_shared] +type=ArmTLB +entry_type=unified +eventq_index=0 +is_stage2=false +next_level=Null +partial_levels=L2 +size=1280 +sys=system + +[system.cpu_cluster.cpus.mmu.stage2_dtb] +type=ArmTLB +entry_type=data +eventq_index=0 +is_stage2=true +next_level=Null +partial_levels= +size=32 +sys=system + +[system.cpu_cluster.cpus.mmu.stage2_dtb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +is_stage2=true +num_squash_per_cycle=2 +power_model= +power_state=system.cpu_cluster.cpus.mmu.stage2_dtb_walker.power_state +sys=system +port=system.cpu_cluster.toL2Bus.cpu_side_ports[5] + +[system.cpu_cluster.cpus.mmu.stage2_dtb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.cpus.mmu.stage2_itb] +type=ArmTLB +entry_type=instruction +eventq_index=0 +is_stage2=true +next_level=Null +partial_levels= +size=32 +sys=system + +[system.cpu_cluster.cpus.mmu.stage2_itb_walker] +type=ArmTableWalker +children=power_state +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +is_stage2=true +num_squash_per_cycle=2 +power_model= +power_state=system.cpu_cluster.cpus.mmu.stage2_itb_walker.power_state +sys=system +port=system.cpu_cluster.toL2Bus.cpu_side_ports[4] + +[system.cpu_cluster.cpus.mmu.stage2_itb_walker.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.cpus.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states=ON CLK_GATED OFF + +[system.cpu_cluster.cpus.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu_cluster.cpus.workload] +type=Process +cmd=/home/carlos/projects/gem5/gem5-run/tinyml_kws +cwd=/home/carlos/projects/gem5/iot +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/carlos/projects/gem5/gem5-run/tinyml_kws +gid=1000 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +release=5.1.0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_cluster.l2] +type=Cache +children=power_state replacement_policy tags +addr_ranges=0:18446744073709551615 +assoc=16 +clk_domain=system.cpu_cluster.clk_domain +clusivity=mostly_excl +compressor=Null +data_latency=12 +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +move_contractions=true +mshrs=32 +power_model= +power_state=system.cpu_cluster.l2.power_state +prefetch_on_access=false +prefetch_on_pf_hit=false +prefetcher=Null +replace_expansions=true +replacement_policy=system.cpu_cluster.l2.replacement_policy +response_latency=5 +sequential_access=false +size=1048576 +system=system +tag_latency=12 +tags=system.cpu_cluster.l2.tags +tgts_per_mshr=8 +warmup_percentage=0 +write_allocator=Null +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu_cluster.toL2Bus.mem_side_ports[0] +mem_side=system.membus.cpu_side_ports[1] + +[system.cpu_cluster.l2.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.l2.replacement_policy] +type=LRURP +eventq_index=0 + +[system.cpu_cluster.l2.tags] +type=BaseSetAssoc +children=indexing_policy power_state +assoc=16 +block_size=64 +clk_domain=system.cpu_cluster.clk_domain +entry_size=64 +eventq_index=0 +indexing_policy=system.cpu_cluster.l2.tags.indexing_policy +power_model= +power_state=system.cpu_cluster.l2.tags.power_state +replacement_policy=system.cpu_cluster.l2.replacement_policy +sequential_access=false +size=1048576 +system=system +tag_latency=12 +warmup_percentage=0 + +[system.cpu_cluster.l2.tags.indexing_policy] +type=SetAssociative +assoc=16 +entry_size=64 +eventq_index=0 +size=1048576 + +[system.cpu_cluster.l2.tags.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.toL2Bus] +type=CoherentXBar +children=power_state snoop_filter +clk_domain=system.cpu_cluster.clk_domain +eventq_index=0 +forward_latency=0 +frontend_latency=1 +header_latency=1 +max_outstanding_snoops=512 +max_routing_table_size=512 +point_of_coherency=false +point_of_unification=true +power_model= +power_state=system.cpu_cluster.toL2Bus.power_state +response_latency=1 +snoop_filter=system.cpu_cluster.toL2Bus.snoop_filter +snoop_response_latency=1 +system=system +use_default_range=false +width=64 +cpu_side_ports=system.cpu_cluster.cpus.icache.mem_side system.cpu_cluster.cpus.dcache.mem_side system.cpu_cluster.cpus.mmu.itb_walker.port system.cpu_cluster.cpus.mmu.dtb_walker.port system.cpu_cluster.cpus.mmu.stage2_itb_walker.port system.cpu_cluster.cpus.mmu.stage2_dtb_walker.port +mem_side_ports=system.cpu_cluster.l2.cpu_side + +[system.cpu_cluster.toL2Bus.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.cpu_cluster.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + +[system.cpu_cluster.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.2 + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.mem_ctrls0] +type=MemCtrl +children=dram power_state +clk_domain=system.clk_domain +command_window=10000 +disable_sanity_check=false +dram=system.mem_ctrls0.dram +eventq_index=0 +mem_sched_policy=frfcfs +min_reads_per_switch=16 +min_writes_per_switch=16 +power_model= +power_state=system.mem_ctrls0.power_state +qos_policy=Null +qos_priorities=1 +qos_priority_escalation=false +qos_q_policy=fifo +qos_requestors= +qos_syncro_scheduler=false +qos_turnaround_policy=Null +static_backend_latency=10000 +static_frontend_latency=10000 +system=system +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.membus.mem_side_ports[0] + +[system.mem_ctrls0.dram] +type=DRAMInterface +children=power_state +IDD0=0.055 +IDD02=0.0 +IDD2N=0.032 +IDD2N2=0.0 +IDD2P0=0.0 +IDD2P02=0.0 +IDD2P1=0.032 +IDD2P12=0.0 +IDD3N=0.038 +IDD3N2=0.0 +IDD3P0=0.0 +IDD3P02=0.0 +IDD3P1=0.038 +IDD3P12=0.0 +IDD4R=0.157 +IDD4R2=0.0 +IDD4W=0.125 +IDD4W2=0.0 +IDD5=0.23500000000000001 +IDD52=0.0 +IDD6=0.02 +IDD62=0.0 +VDD=1.5 +VDD2=0.0 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +beats_per_clock=2 +burst_length=8 +clk_domain=system.clk_domain +conf_table_reported=true +data_clock_sync=false +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +enable_dram_powerdown=false +eventq_index=0 +image_file= +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +null=false +page_policy=open_adaptive +power_model= +power_state=system.mem_ctrls0.dram.power_state +range=0:536870912:0:128 +ranks_per_channel=2 +read_buffer_size=32 +tAAD=1250 +tBURST=5000 +tBURST_MAX=5000 +tBURST_MIN=5000 +tCCD_L=0 +tCCD_L_WR=0 +tCK=1250 +tCL=13750 +tCS=2500 +tCWL=13750 +tPPD=0 +tRAS=35000 +tRCD=13750 +tRCD_WR=13750 +tREFI=7800000 +tRFC=260000 +tRP=13750 +tRRD=6000 +tRRD_L=0 +tRTP=7500 +tRTW=2500 +tWR=15000 +tWTR=7500 +tWTR_L=7500 +tXAW=30000 +tXP=6000 +tXPDLL=0 +tXS=270000 +tXSDLL=0 +two_cycle_activate=false +write_buffer_size=64 +writeable=true + +[system.mem_ctrls0.dram.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.mem_ctrls0.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.mem_ctrls1] +type=MemCtrl +children=dram power_state +clk_domain=system.clk_domain +command_window=10000 +disable_sanity_check=false +dram=system.mem_ctrls1.dram +eventq_index=0 +mem_sched_policy=frfcfs +min_reads_per_switch=16 +min_writes_per_switch=16 +power_model= +power_state=system.mem_ctrls1.power_state +qos_policy=Null +qos_priorities=1 +qos_priority_escalation=false +qos_q_policy=fifo +qos_requestors= +qos_syncro_scheduler=false +qos_turnaround_policy=Null +static_backend_latency=10000 +static_frontend_latency=10000 +system=system +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.membus.mem_side_ports[1] + +[system.mem_ctrls1.dram] +type=DRAMInterface +children=power_state +IDD0=0.055 +IDD02=0.0 +IDD2N=0.032 +IDD2N2=0.0 +IDD2P0=0.0 +IDD2P02=0.0 +IDD2P1=0.032 +IDD2P12=0.0 +IDD3N=0.038 +IDD3N2=0.0 +IDD3P0=0.0 +IDD3P02=0.0 +IDD3P1=0.038 +IDD3P12=0.0 +IDD4R=0.157 +IDD4R2=0.0 +IDD4W=0.125 +IDD4W2=0.0 +IDD5=0.23500000000000001 +IDD52=0.0 +IDD6=0.02 +IDD62=0.0 +VDD=1.5 +VDD2=0.0 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +beats_per_clock=2 +burst_length=8 +clk_domain=system.clk_domain +conf_table_reported=true +data_clock_sync=false +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +enable_dram_powerdown=false +eventq_index=0 +image_file= +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +null=false +page_policy=open_adaptive +power_model= +power_state=system.mem_ctrls1.dram.power_state +range=0:536870912:1:128 +ranks_per_channel=2 +read_buffer_size=32 +tAAD=1250 +tBURST=5000 +tBURST_MAX=5000 +tBURST_MIN=5000 +tCCD_L=0 +tCCD_L_WR=0 +tCK=1250 +tCL=13750 +tCS=2500 +tCWL=13750 +tPPD=0 +tRAS=35000 +tRCD=13750 +tRCD_WR=13750 +tREFI=7800000 +tRFC=260000 +tRP=13750 +tRRD=6000 +tRRD_L=0 +tRTP=7500 +tRTW=2500 +tWR=15000 +tWTR=7500 +tWTR_L=7500 +tXAW=30000 +tXP=6000 +tXPDLL=0 +tXS=270000 +tXSDLL=0 +two_cycle_activate=false +write_buffer_size=64 +writeable=true + +[system.mem_ctrls1.dram.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.mem_ctrls1.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.membus] +type=CoherentXBar +children=power_state snoop_filter +clk_domain=system.clk_domain +eventq_index=0 +forward_latency=4 +frontend_latency=3 +header_latency=1 +max_outstanding_snoops=512 +max_routing_table_size=512 +point_of_coherency=true +point_of_unification=true +power_model= +power_state=system.membus.power_state +response_latency=2 +snoop_filter=system.membus.snoop_filter +snoop_response_latency=4 +system=system +use_default_range=false +width=16 +cpu_side_ports=system.system_port system.cpu_cluster.l2.mem_side +mem_side_ports=system.mem_ctrls0.port system.mem_ctrls1.port + +[system.membus.power_state] +type=PowerState +clk_gate_bins=20 +clk_gate_max=1000000000000 +clk_gate_min=1000 +default_state=UNDEFINED +eventq_index=0 +leaders= +possible_states= + +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=3.3 + +[system.workload] +type=ArmEmuLinux +eventq_index=0 +remote_gdb_port=#7000 +wait_for_remote_gdb=false + diff --git a/m5out_debug/config.json b/m5out_debug/config.json new file mode 100644 index 0000000..8349f9b --- /dev/null +++ b/m5out_debug/config.json @@ -0,0 +1,2294 @@ +{ + "type": "Root", + "cxx_class": "gem5::Root", + "name": null, + "path": "root", + "eventq_index": 0, + "full_system": false, + "sim_quantum": 0, + "time_sync_enable": false, + "time_sync_period": 100000000000, + "time_sync_spin_threshold": 100000000, + "system": { + "type": "System", + "cxx_class": "gem5::System", + "name": "system", + "path": "system", + "auto_unlink_shared_backstore": false, + "cache_line_size": 64, + "eventq_index": 0, + "exit_on_work_items": false, + "init_param": 0, + "m5ops_base": 0, + "mem_mode": "timing", + "mem_ranges": [ + "0:536870912" + ], + "memories": [ + "system.mem_ctrls0.dram", + "system.mem_ctrls1.dram" + ], + "mmap_using_noreserve": false, + "multi_thread": false, + "num_work_ids": 16, + "readfile": "", + "redirect_paths": [], + "shadow_rom_ranges": [], + "shared_backstore": "", + "symbolfile": "", + "thermal_components": [], + "thermal_model": null, + "work_begin_ckpt_count": 0, + "work_begin_cpu_id_exit": -1, + "work_begin_exit_count": 0, + "work_cpus_ckpt_count": 0, + "work_end_ckpt_count": 0, + "work_end_exit_count": 0, + "work_item_id": -1, + "workload": { + "type": "ArmEmuLinux", + "cxx_class": "gem5::ArmISA::EmuLinux", + "name": "workload", + "path": "system.workload", + "eventq_index": 0, + "remote_gdb_port": "#7000", + "wait_for_remote_gdb": false + }, + "clk_domain": { + "type": "SrcClockDomain", + "cxx_class": "gem5::SrcClockDomain", + "name": "clk_domain", + "path": "system.clk_domain", + "clock": [ + 1000 + ], + "domain_id": -1, + "eventq_index": 0, + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain" + }, + "cpu_cluster": { + "type": "CpuCluster", + "cxx_class": "gem5::CpuCluster", + "name": "cpu_cluster", + "path": "system.cpu_cluster", + "clk_domain": { + "type": "SrcClockDomain", + "cxx_class": "gem5::SrcClockDomain", + "name": "clk_domain", + "path": "system.cpu_cluster.clk_domain", + "clock": [ + 250 + ], + "domain_id": -1, + "eventq_index": 0, + "init_perf_level": 0, + "voltage_domain": "system.cpu_cluster.voltage_domain" + }, + "eventq_index": 0, + "thermal_domain": null, + "voltage_domain": { + "type": "VoltageDomain", + "cxx_class": "gem5::VoltageDomain", + "name": "voltage_domain", + "path": "system.cpu_cluster.voltage_domain", + "eventq_index": 0, + "voltage": [ + 1.2 + ] + }, + "cpus": [ + { + "type": "BaseMinorCPU", + "cxx_class": "gem5::MinorCPU", + "name": "cpus", + "path": "system.cpu_cluster.cpus", + "branchPred": { + "type": "TournamentBP", + "cxx_class": "gem5::branch_prediction::TournamentBP", + "name": "branchPred", + "path": "system.cpu_cluster.cpus.branchPred", + "BTBEntries": 4096, + "BTBTagSize": 16, + "RASSize": 16, + "choiceCtrBits": 2, + "choicePredictorSize": 8192, + "eventq_index": 0, + "globalCtrBits": 2, + "globalPredictorSize": 8192, + "indirectBranchPred": { + "type": "SimpleIndirectPredictor", + "cxx_class": "gem5::branch_prediction::SimpleIndirectPredictor", + "name": "indirectBranchPred", + "path": "system.cpu_cluster.cpus.branchPred.indirectBranchPred", + "eventq_index": 0, + "indirectGHRBits": 13, + "indirectHashGHR": true, + "indirectHashTargets": true, + "indirectPathLength": 3, + "indirectSets": 256, + "indirectTagSize": 16, + "indirectWays": 2, + "instShiftAmt": 2, + "numThreads": 1 + }, + "instShiftAmt": 2, + "localCtrBits": 2, + "localHistoryTableSize": 2048, + "localPredictorSize": 2048, + "numThreads": 1 + }, + "checker": null, + "clk_domain": "system.cpu_cluster.clk_domain", + "cpu_id": 0, + "decodeCycleInput": true, + "decodeInputBufferSize": 3, + "decodeInputWidth": 2, + "decodeToExecuteForwardDelay": 1, + "decoder": [ + { + "type": "ArmDecoder", + "cxx_class": "gem5::ArmISA::Decoder", + "name": "decoder", + "path": "system.cpu_cluster.cpus.decoder", + "dvm_enabled": false, + "eventq_index": 0, + "isa": "system.cpu_cluster.cpus.isa" + } + ], + "do_checkpoint_insts": true, + "do_statistics_insts": true, + "enableIdling": true, + "eventq_index": 0, + "executeAllowEarlyMemoryIssue": true, + "executeBranchDelay": 1, + "executeCommitLimit": 2, + "executeCycleInput": true, + "executeFuncUnits": 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1, + "max_outstanding_snoops": 512, + "max_routing_table_size": 512, + "point_of_coherency": true, + "point_of_unification": true, + "power_model": [], + "power_state": { + "type": "PowerState", + "cxx_class": "gem5::PowerState", + "name": "power_state", + "path": "system.membus.power_state", + "clk_gate_bins": 20, + "clk_gate_max": 1000000000000, + "clk_gate_min": 1000, + "default_state": "UNDEFINED", + "eventq_index": 0, + "leaders": [], + "possible_states": [] + }, + "response_latency": 2, + "snoop_filter": { + "type": "SnoopFilter", + "cxx_class": "gem5::SnoopFilter", + "name": "snoop_filter", + "path": "system.membus.snoop_filter", + "eventq_index": 0, + "lookup_latency": 1, + "max_capacity": 8388608, + "system": "system" + }, + "snoop_response_latency": 4, + "system": "system", + "use_default_range": false, + "width": 16, + "cpu_side_ports": { + "role": "GEM5 RESPONDER", + "peer": [ + "system.system_port", + "system.cpu_cluster.l2.mem_side" + ], + "is_source": "False" + }, + "mem_side_ports": { + "role": "GEM5 REQUESTOR", + "peer": [ + "system.mem_ctrls0.port", + "system.mem_ctrls1.port" + ], + "is_source": "True" + } + }, + "voltage_domain": { + "type": "VoltageDomain", + "cxx_class": "gem5::VoltageDomain", + "name": "voltage_domain", + "path": "system.voltage_domain", + "eventq_index": 0, + "voltage": [ + 3.3 + ] + }, + "system_port": { + "role": "GEM5 REQUESTOR", + "peer": "system.membus.cpu_side_ports[0]", + "is_source": "True" + } + } +} \ No newline at end of file diff --git a/m5out_debug/stats.txt b/m5out_debug/stats.txt new file mode 100644 index 0000000..e69de29 diff --git a/scripts/env.sh b/scripts/env.sh index 9de8acc..25e2dad 100755 --- a/scripts/env.sh +++ b/scripts/env.sh @@ -6,7 +6,7 @@ SRC="$ROOT/gem5src/gem5" IOT="$ROOT/iot" DATA="$ROOT/gem5-data" # persistent (symlink to /mnt/storage/…) RUN="$ROOT/gem5-run" # workloads -CFG="$IOT/scripts/hetero_big_little.py" # gem5 config +CFG="$ROOT/gem5src/gem5/configs/example/arm/starter_se.py" # --- build target (ARM by default) --- GEM5_BIN="$ROOT/build/ARM/gem5.opt" diff --git a/scripts/hetero_big_little.py b/scripts/hetero_big_little.py index e479517..a78fe33 100644 --- a/scripts/hetero_big_little.py +++ b/scripts/hetero_big_little.py @@ -79,7 +79,7 @@ system.system_port = system.membus.slave proc = Process() proc.executable = args.cmd proc.cmd = [args.cmd] -system.workload = SEWorkload.init_compatible(args.cmd) +proc.env = {'GLIBC_TUNABLES': 'glibc.pthread.rseq=0'} for c in system.cpu: c.workload = proc c.createThreads()