[root] type=Root children=system eventq_index=0 full_system=false sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 [system] type=System children=clk_domain cpu_cluster dvfs_handler mem_ctrls0 mem_ctrls1 membus voltage_domain workload auto_unlink_shared_backstore=false cache_line_size=64 eventq_index=0 exit_on_work_items=false init_param=0 m5ops_base=0 mem_mode=timing mem_ranges=0:536870912 memories=system.mem_ctrls0.dram system.mem_ctrls1.dram mmap_using_noreserve=false multi_thread=false num_work_ids=16 readfile= redirect_paths= shadow_rom_ranges= shared_backstore= symbolfile= thermal_components= thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 workload=system.workload system_port=system.membus.cpu_side_ports[0] [system.clk_domain] type=SrcClockDomain clock=1000 domain_id=-1 eventq_index=0 init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu_cluster] type=CpuCluster children=clk_domain cpus l2 toL2Bus voltage_domain clk_domain=system.cpu_cluster.clk_domain eventq_index=0 thermal_domain=Null voltage_domain=system.cpu_cluster.voltage_domain [system.cpu_cluster.clk_domain] type=SrcClockDomain clock=250 domain_id=-1 eventq_index=0 init_perf_level=0 voltage_domain=system.cpu_cluster.voltage_domain [system.cpu_cluster.cpus] type=BaseMinorCPU children=branchPred dcache decoder executeFuncUnits icache interrupts isa mmu power_state tracer workload branchPred=system.cpu_cluster.cpus.branchPred checker=Null clk_domain=system.cpu_cluster.clk_domain cpu_id=0 decodeCycleInput=true decodeInputBufferSize=3 decodeInputWidth=2 decodeToExecuteForwardDelay=1 decoder=system.cpu_cluster.cpus.decoder do_checkpoint_insts=true do_statistics_insts=true enableIdling=true eventq_index=0 executeAllowEarlyMemoryIssue=true executeBranchDelay=1 executeCommitLimit=2 executeCycleInput=true executeFuncUnits=system.cpu_cluster.cpus.executeFuncUnits executeInputBufferSize=7 executeInputWidth=2 executeIssueLimit=2 executeLSQMaxStoreBufferStoresPerCycle=2 executeLSQRequestsQueueSize=1 executeLSQStoreBufferSize=5 executeLSQTransfersQueueSize=2 executeMaxAccessesInMemory=2 executeMemoryCommitLimit=1 executeMemoryIssueLimit=1 executeMemoryWidth=0 executeSetTraceTimeOnCommit=true executeSetTraceTimeOnIssue=false fetch1FetchLimit=1 fetch1LineSnapWidth=0 fetch1LineWidth=0 fetch1ToFetch2BackwardDelay=1 fetch1ToFetch2ForwardDelay=1 fetch2CycleInput=true fetch2InputBufferSize=2 fetch2ToDecodeForwardDelay=1 function_trace=false function_trace_start=0 interrupts=system.cpu_cluster.cpus.interrupts isa=system.cpu_cluster.cpus.isa max_insts_all_threads=0 max_insts_any_thread=0 mmu=system.cpu_cluster.cpus.mmu numThreads=1 power_gating_on_idle=false power_model= power_state=system.cpu_cluster.cpus.power_state progress_interval=0 pwr_gating_latency=300 simpoint_start_insts= socket_id=0 switched_out=false syscallRetryLatency=10000 system=system threadPolicy=RoundRobin tracer=system.cpu_cluster.cpus.tracer workload=system.cpu_cluster.cpus.workload dcache_port=system.cpu_cluster.cpus.dcache.cpu_side icache_port=system.cpu_cluster.cpus.icache.cpu_side [system.cpu_cluster.cpus.branchPred] type=TournamentBP children=indirectBranchPred BTBEntries=4096 BTBTagSize=16 RASSize=16 choiceCtrBits=2 choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 indirectBranchPred=system.cpu_cluster.cpus.branchPred.indirectBranchPred instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 [system.cpu_cluster.cpus.branchPred.indirectBranchPred] type=SimpleIndirectPredictor eventq_index=0 indirectGHRBits=13 indirectHashGHR=true indirectHashTargets=true indirectPathLength=3 indirectSets=256 indirectTagSize=16 indirectWays=2 instShiftAmt=2 numThreads=1 [system.cpu_cluster.cpus.dcache] type=Cache children=power_state replacement_policy tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_cluster.clk_domain clusivity=mostly_incl compressor=Null data_latency=2 demand_mshr_reserve=1 eventq_index=0 is_read_only=false max_miss_count=0 move_contractions=true mshrs=16 power_model= power_state=system.cpu_cluster.cpus.dcache.power_state prefetch_on_access=false prefetch_on_pf_hit=false prefetcher=Null replace_expansions=true replacement_policy=system.cpu_cluster.cpus.dcache.replacement_policy response_latency=1 sequential_access=false size=32768 system=system tag_latency=2 tags=system.cpu_cluster.cpus.dcache.tags tgts_per_mshr=16 warmup_percentage=0 write_allocator=Null write_buffers=16 writeback_clean=false cpu_side=system.cpu_cluster.cpus.dcache_port mem_side=system.cpu_cluster.toL2Bus.cpu_side_ports[1] [system.cpu_cluster.cpus.dcache.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.dcache.replacement_policy] type=LRURP eventq_index=0 [system.cpu_cluster.cpus.dcache.tags] type=BaseSetAssoc children=indexing_policy power_state assoc=2 block_size=64 clk_domain=system.cpu_cluster.clk_domain entry_size=64 eventq_index=0 indexing_policy=system.cpu_cluster.cpus.dcache.tags.indexing_policy power_model= power_state=system.cpu_cluster.cpus.dcache.tags.power_state replacement_policy=system.cpu_cluster.cpus.dcache.replacement_policy sequential_access=false size=32768 system=system tag_latency=2 warmup_percentage=0 [system.cpu_cluster.cpus.dcache.tags.indexing_policy] type=SetAssociative assoc=2 entry_size=64 eventq_index=0 size=32768 [system.cpu_cluster.cpus.dcache.tags.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.decoder] type=ArmDecoder dvm_enabled=false eventq_index=0 isa=system.cpu_cluster.cpus.isa [system.cpu_cluster.cpus.executeFuncUnits] type=MinorFUPool children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 funcUnits7 funcUnits8 eventq_index=0 funcUnits=system.cpu_cluster.cpus.executeFuncUnits.funcUnits0 system.cpu_cluster.cpus.executeFuncUnits.funcUnits1 system.cpu_cluster.cpus.executeFuncUnits.funcUnits2 system.cpu_cluster.cpus.executeFuncUnits.funcUnits3 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4 system.cpu_cluster.cpus.executeFuncUnits.funcUnits5 system.cpu_cluster.cpus.executeFuncUnits.funcUnits6 system.cpu_cluster.cpus.executeFuncUnits.funcUnits7 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.opClasses opLat=3 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.opClasses] type=MinorOpClassSet children=opClasses eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.opClasses.opClasses [system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.opClasses.opClasses] type=MinorOpClass eventq_index=0 opClass=IntAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.timings] type=MinorFUTiming children=opClasses description=Int eventq_index=0 extraAssumedLat=0 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.timings.opClasses srcRegsRelativeLats=2 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits0.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.opClasses opLat=3 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.opClasses] type=MinorOpClassSet children=opClasses eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.opClasses.opClasses [system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.opClasses.opClasses] type=MinorOpClass eventq_index=0 opClass=IntAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.timings] type=MinorFUTiming children=opClasses description=Int eventq_index=0 extraAssumedLat=0 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.timings.opClasses srcRegsRelativeLats=2 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits1.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.opClasses opLat=3 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.opClasses] type=MinorOpClassSet children=opClasses eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.opClasses.opClasses [system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.opClasses.opClasses] type=MinorOpClass eventq_index=0 opClass=IntMult [system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.timings] type=MinorFUTiming children=opClasses description=Mul eventq_index=0 extraAssumedLat=0 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.timings.opClasses srcRegsRelativeLats=0 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits2.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits3.opClasses opLat=9 timings= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits3.opClasses] type=MinorOpClassSet children=opClasses eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits3.opClasses.opClasses [system.cpu_cluster.cpus.executeFuncUnits.funcUnits3.opClasses.opClasses] type=MinorOpClass eventq_index=0 opClass=IntDiv [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses opLat=6 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses] type=MinorOpClassSet children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27 opClasses28 opClasses29 opClasses30 opClasses31 opClasses32 opClasses33 opClasses34 opClasses35 opClasses36 opClasses37 opClasses38 opClasses39 opClasses40 opClasses41 opClasses42 opClasses43 opClasses44 opClasses45 opClasses46 eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses27 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses28 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses29 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses30 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses31 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses32 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses33 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses34 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses35 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses36 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses37 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses38 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses39 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses40 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses41 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses42 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses43 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses44 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses45 system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses46 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses00] type=MinorOpClass eventq_index=0 opClass=FloatAdd [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses01] type=MinorOpClass eventq_index=0 opClass=FloatCmp [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses02] type=MinorOpClass eventq_index=0 opClass=FloatCvt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses03] type=MinorOpClass eventq_index=0 opClass=FloatMisc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses04] type=MinorOpClass eventq_index=0 opClass=FloatMult [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses05] type=MinorOpClass eventq_index=0 opClass=FloatMultAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses06] type=MinorOpClass eventq_index=0 opClass=FloatDiv [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses07] type=MinorOpClass eventq_index=0 opClass=FloatSqrt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses08] type=MinorOpClass eventq_index=0 opClass=SimdAdd [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses09] type=MinorOpClass eventq_index=0 opClass=SimdAddAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses10] type=MinorOpClass eventq_index=0 opClass=SimdAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses11] type=MinorOpClass eventq_index=0 opClass=SimdCmp [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses12] type=MinorOpClass eventq_index=0 opClass=SimdCvt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses13] type=MinorOpClass eventq_index=0 opClass=SimdMisc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses14] type=MinorOpClass eventq_index=0 opClass=SimdMult [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses15] type=MinorOpClass eventq_index=0 opClass=SimdMultAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses16] type=MinorOpClass eventq_index=0 opClass=SimdMatMultAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses17] type=MinorOpClass eventq_index=0 opClass=SimdShift [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses18] type=MinorOpClass eventq_index=0 opClass=SimdShiftAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses19] type=MinorOpClass eventq_index=0 opClass=SimdDiv [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses20] type=MinorOpClass eventq_index=0 opClass=SimdSqrt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses21] type=MinorOpClass eventq_index=0 opClass=SimdFloatAdd [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses22] type=MinorOpClass eventq_index=0 opClass=SimdFloatAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses23] type=MinorOpClass eventq_index=0 opClass=SimdFloatCmp [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses24] type=MinorOpClass eventq_index=0 opClass=SimdFloatCvt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses25] type=MinorOpClass eventq_index=0 opClass=SimdFloatDiv [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses26] type=MinorOpClass eventq_index=0 opClass=SimdFloatMisc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses27] type=MinorOpClass eventq_index=0 opClass=SimdFloatMult [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses28] type=MinorOpClass eventq_index=0 opClass=SimdFloatMultAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses29] type=MinorOpClass eventq_index=0 opClass=SimdFloatMatMultAcc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses30] type=MinorOpClass eventq_index=0 opClass=SimdFloatSqrt [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses31] type=MinorOpClass eventq_index=0 opClass=SimdReduceAdd [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses32] type=MinorOpClass eventq_index=0 opClass=SimdReduceAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses33] type=MinorOpClass eventq_index=0 opClass=SimdReduceCmp [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses34] type=MinorOpClass eventq_index=0 opClass=SimdFloatReduceAdd [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses35] type=MinorOpClass eventq_index=0 opClass=SimdFloatReduceCmp [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses36] type=MinorOpClass eventq_index=0 opClass=SimdAes [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses37] type=MinorOpClass eventq_index=0 opClass=SimdAesMix [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses38] type=MinorOpClass eventq_index=0 opClass=SimdSha1Hash [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses39] type=MinorOpClass eventq_index=0 opClass=SimdSha1Hash2 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses40] type=MinorOpClass eventq_index=0 opClass=SimdSha256Hash [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses41] type=MinorOpClass eventq_index=0 opClass=SimdSha256Hash2 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses42] type=MinorOpClass eventq_index=0 opClass=SimdShaSigma2 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses43] type=MinorOpClass eventq_index=0 opClass=SimdShaSigma3 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses44] type=MinorOpClass eventq_index=0 opClass=Matrix [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses45] type=MinorOpClass eventq_index=0 opClass=MatrixMov [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.opClasses.opClasses46] type=MinorOpClass eventq_index=0 opClass=MatrixOP [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.timings] type=MinorFUTiming children=opClasses description=FloatSimd eventq_index=0 extraAssumedLat=0 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.timings.opClasses srcRegsRelativeLats=2 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits4.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.opClasses opLat=3 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.opClasses] type=MinorOpClassSet children=opClasses eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.opClasses.opClasses [system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.opClasses.opClasses] type=MinorOpClass eventq_index=0 opClass=SimdPredAlu [system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.timings] type=MinorFUTiming children=opClasses description=Pred eventq_index=0 extraAssumedLat=0 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.timings.opClasses srcRegsRelativeLats=2 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits5.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses timings cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses opLat=1 timings=system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.timings [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses] type=MinorOpClassSet children=opClasses0 opClasses1 opClasses2 opClasses3 eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses1 system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses2 system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses3 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses0] type=MinorOpClass eventq_index=0 opClass=MemRead [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses1] type=MinorOpClass eventq_index=0 opClass=MemWrite [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses2] type=MinorOpClass eventq_index=0 opClass=FloatMemRead [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.opClasses.opClasses3] type=MinorOpClass eventq_index=0 opClass=FloatMemWrite [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.timings] type=MinorFUTiming children=opClasses description=Mem eventq_index=0 extraAssumedLat=2 extraCommitLat=0 extraCommitLatExpr=Null mask=0 match=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.timings.opClasses srcRegsRelativeLats=1 suppress=false [system.cpu_cluster.cpus.executeFuncUnits.funcUnits6.timings.opClasses] type=MinorOpClassSet eventq_index=0 opClasses= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits7] type=MinorFU children=opClasses cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses opLat=1 timings= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses] type=MinorOpClassSet children=opClasses0 opClasses1 eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses.opClasses0 system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses.opClasses1 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses.opClasses0] type=MinorOpClass eventq_index=0 opClass=IprAccess [system.cpu_cluster.cpus.executeFuncUnits.funcUnits7.opClasses.opClasses1] type=MinorOpClass eventq_index=0 opClass=InstPrefetch [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8] type=MinorFU children=opClasses cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses opLat=1 timings= [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses] type=MinorOpClassSet children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 eventq_index=0 opClasses=system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses00 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses01 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses02 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses03 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses04 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses05 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses06 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses07 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses08 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses09 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses10 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses11 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses12 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses13 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses14 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses15 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses16 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses17 system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses18 [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses00] type=MinorOpClass eventq_index=0 opClass=VectorUnitStrideLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses01] type=MinorOpClass eventq_index=0 opClass=VectorUnitStrideStore [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses02] type=MinorOpClass eventq_index=0 opClass=VectorUnitStrideMaskLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses03] type=MinorOpClass eventq_index=0 opClass=VectorUnitStrideMaskStore [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses04] type=MinorOpClass eventq_index=0 opClass=VectorStridedLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses05] type=MinorOpClass eventq_index=0 opClass=VectorStridedStore [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses06] type=MinorOpClass eventq_index=0 opClass=VectorIndexedLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses07] type=MinorOpClass eventq_index=0 opClass=VectorIndexedStore [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses08] type=MinorOpClass eventq_index=0 opClass=VectorUnitStrideFaultOnlyFirstLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses09] type=MinorOpClass eventq_index=0 opClass=VectorWholeRegisterLoad [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses10] type=MinorOpClass eventq_index=0 opClass=VectorWholeRegisterStore [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses11] type=MinorOpClass eventq_index=0 opClass=VectorIntegerArith [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses12] type=MinorOpClass eventq_index=0 opClass=VectorFloatArith [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses13] type=MinorOpClass eventq_index=0 opClass=VectorFloatConvert [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses14] type=MinorOpClass eventq_index=0 opClass=VectorIntegerReduce [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses15] type=MinorOpClass eventq_index=0 opClass=VectorFloatReduce [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses16] type=MinorOpClass eventq_index=0 opClass=VectorMisc [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses17] type=MinorOpClass eventq_index=0 opClass=VectorIntegerExtension [system.cpu_cluster.cpus.executeFuncUnits.funcUnits8.opClasses.opClasses18] type=MinorOpClass eventq_index=0 opClass=VectorConfig [system.cpu_cluster.cpus.icache] type=Cache children=power_state replacement_policy tags addr_ranges=0:18446744073709551615 assoc=3 clk_domain=system.cpu_cluster.clk_domain clusivity=mostly_incl compressor=Null data_latency=1 demand_mshr_reserve=1 eventq_index=0 is_read_only=true max_miss_count=0 move_contractions=true mshrs=4 power_model= power_state=system.cpu_cluster.cpus.icache.power_state prefetch_on_access=false prefetch_on_pf_hit=false prefetcher=Null replace_expansions=true replacement_policy=system.cpu_cluster.cpus.icache.replacement_policy response_latency=1 sequential_access=false size=49152 system=system tag_latency=1 tags=system.cpu_cluster.cpus.icache.tags tgts_per_mshr=8 warmup_percentage=0 write_allocator=Null write_buffers=8 writeback_clean=true cpu_side=system.cpu_cluster.cpus.icache_port mem_side=system.cpu_cluster.toL2Bus.cpu_side_ports[0] [system.cpu_cluster.cpus.icache.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.icache.replacement_policy] type=LRURP eventq_index=0 [system.cpu_cluster.cpus.icache.tags] type=BaseSetAssoc children=indexing_policy power_state assoc=3 block_size=64 clk_domain=system.cpu_cluster.clk_domain entry_size=64 eventq_index=0 indexing_policy=system.cpu_cluster.cpus.icache.tags.indexing_policy power_model= power_state=system.cpu_cluster.cpus.icache.tags.power_state replacement_policy=system.cpu_cluster.cpus.icache.replacement_policy sequential_access=false size=49152 system=system tag_latency=1 warmup_percentage=0 [system.cpu_cluster.cpus.icache.tags.indexing_policy] type=SetAssociative assoc=3 entry_size=64 eventq_index=0 size=49152 [system.cpu_cluster.cpus.icache.tags.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.interrupts] type=ArmInterrupts eventq_index=0 [system.cpu_cluster.cpus.isa] type=ArmISA children=release_se decoderFlavor=Generic eventq_index=0 fpsid=1090793632 id_aa64afr0_el1=0 id_aa64afr1_el1=0 id_aa64dfr0_el1=15790086 id_aa64dfr1_el1=0 id_aa64isar0_el1=268435456 id_aa64isar1_el1=16846864 id_aa64mmfr0_el1=15728642 id_aa64mmfr1_el1=1052704 id_aa64mmfr2_el1=65552 id_isar0=34607377 id_isar1=34677009 id_isar2=555950401 id_isar3=17899825 id_isar4=268501314 id_isar5=285212672 id_isar6=1 id_mmfr0=270536963 id_mmfr1=0 id_mmfr2=19070976 id_mmfr3=34611729 id_mmfr4=0 impdef_nop=false midr=0 pmu=Null release_se=system.cpu_cluster.cpus.isa.release_se sme_vl_se=1 sve_vl_se=1 system=system [system.cpu_cluster.cpus.isa.release_se] type=ArmRelease eventq_index=0 extensions=CRYPTO FEAT_LSE FEAT_RDM FEAT_F32MM FEAT_F64MM FEAT_SVE FEAT_I8MM FEAT_DOTPROD FEAT_FCMA FEAT_JSCVT FEAT_PAuth FEAT_FLAGM FEAT_FLAGM2 FEAT_SME TME [system.cpu_cluster.cpus.mmu] type=ArmMMU children=dtb dtb_walker itb itb_walker l2_shared stage2_dtb stage2_dtb_walker stage2_itb stage2_itb_walker dtb=system.cpu_cluster.cpus.mmu.dtb dtb_walker=system.cpu_cluster.cpus.mmu.dtb_walker eventq_index=0 itb=system.cpu_cluster.cpus.mmu.itb itb_walker=system.cpu_cluster.cpus.mmu.itb_walker release_se=system.cpu_cluster.cpus.isa.release_se stage2_dtb=system.cpu_cluster.cpus.mmu.stage2_dtb stage2_dtb_walker=system.cpu_cluster.cpus.mmu.stage2_dtb_walker stage2_itb=system.cpu_cluster.cpus.mmu.stage2_itb stage2_itb_walker=system.cpu_cluster.cpus.mmu.stage2_itb_walker sys=system [system.cpu_cluster.cpus.mmu.dtb] type=ArmTLB entry_type=data eventq_index=0 is_stage2=false next_level=system.cpu_cluster.cpus.mmu.l2_shared partial_levels= size=64 sys=system [system.cpu_cluster.cpus.mmu.dtb_walker] type=ArmTableWalker children=power_state clk_domain=system.cpu_cluster.clk_domain eventq_index=0 is_stage2=false num_squash_per_cycle=2 power_model= power_state=system.cpu_cluster.cpus.mmu.dtb_walker.power_state sys=system port=system.cpu_cluster.toL2Bus.cpu_side_ports[3] [system.cpu_cluster.cpus.mmu.dtb_walker.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.mmu.itb] type=ArmTLB entry_type=instruction eventq_index=0 is_stage2=false next_level=system.cpu_cluster.cpus.mmu.l2_shared partial_levels= size=64 sys=system [system.cpu_cluster.cpus.mmu.itb_walker] type=ArmTableWalker children=power_state clk_domain=system.cpu_cluster.clk_domain eventq_index=0 is_stage2=false num_squash_per_cycle=2 power_model= power_state=system.cpu_cluster.cpus.mmu.itb_walker.power_state sys=system port=system.cpu_cluster.toL2Bus.cpu_side_ports[2] [system.cpu_cluster.cpus.mmu.itb_walker.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.mmu.l2_shared] type=ArmTLB entry_type=unified eventq_index=0 is_stage2=false next_level=Null partial_levels=L2 size=1280 sys=system [system.cpu_cluster.cpus.mmu.stage2_dtb] type=ArmTLB entry_type=data eventq_index=0 is_stage2=true next_level=Null partial_levels= size=32 sys=system [system.cpu_cluster.cpus.mmu.stage2_dtb_walker] type=ArmTableWalker children=power_state clk_domain=system.cpu_cluster.clk_domain eventq_index=0 is_stage2=true num_squash_per_cycle=2 power_model= power_state=system.cpu_cluster.cpus.mmu.stage2_dtb_walker.power_state sys=system port=system.cpu_cluster.toL2Bus.cpu_side_ports[5] [system.cpu_cluster.cpus.mmu.stage2_dtb_walker.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.mmu.stage2_itb] type=ArmTLB entry_type=instruction eventq_index=0 is_stage2=true next_level=Null partial_levels= size=32 sys=system [system.cpu_cluster.cpus.mmu.stage2_itb_walker] type=ArmTableWalker children=power_state clk_domain=system.cpu_cluster.clk_domain eventq_index=0 is_stage2=true num_squash_per_cycle=2 power_model= power_state=system.cpu_cluster.cpus.mmu.stage2_itb_walker.power_state sys=system port=system.cpu_cluster.toL2Bus.cpu_side_ports[4] [system.cpu_cluster.cpus.mmu.stage2_itb_walker.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.cpus.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states=ON CLK_GATED OFF [system.cpu_cluster.cpus.tracer] type=ExeTracer eventq_index=0 [system.cpu_cluster.cpus.workload] type=Process cmd=/home/carlos/projects/gem5/gem5-run/tinyml_kws cwd=/home/carlos/projects/gem5/iot drivers= egid=100 env= errout=cerr euid=100 eventq_index=0 executable=/home/carlos/projects/gem5/gem5-run/tinyml_kws gid=1000 input=cin kvmInSE=false maxStackSize=67108864 output=cout pgid=100 pid=100 ppid=0 release=5.1.0 simpoint=0 system=system uid=100 useArchPT=false [system.cpu_cluster.l2] type=Cache children=power_state replacement_policy tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_cluster.clk_domain clusivity=mostly_excl compressor=Null data_latency=12 demand_mshr_reserve=1 eventq_index=0 is_read_only=false max_miss_count=0 move_contractions=true mshrs=32 power_model= power_state=system.cpu_cluster.l2.power_state prefetch_on_access=false prefetch_on_pf_hit=false prefetcher=Null replace_expansions=true replacement_policy=system.cpu_cluster.l2.replacement_policy response_latency=5 sequential_access=false size=1048576 system=system tag_latency=12 tags=system.cpu_cluster.l2.tags tgts_per_mshr=8 warmup_percentage=0 write_allocator=Null write_buffers=8 writeback_clean=false cpu_side=system.cpu_cluster.toL2Bus.mem_side_ports[0] mem_side=system.membus.cpu_side_ports[1] [system.cpu_cluster.l2.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.l2.replacement_policy] type=LRURP eventq_index=0 [system.cpu_cluster.l2.tags] type=BaseSetAssoc children=indexing_policy power_state assoc=16 block_size=64 clk_domain=system.cpu_cluster.clk_domain entry_size=64 eventq_index=0 indexing_policy=system.cpu_cluster.l2.tags.indexing_policy power_model= power_state=system.cpu_cluster.l2.tags.power_state replacement_policy=system.cpu_cluster.l2.replacement_policy sequential_access=false size=1048576 system=system tag_latency=12 warmup_percentage=0 [system.cpu_cluster.l2.tags.indexing_policy] type=SetAssociative assoc=16 entry_size=64 eventq_index=0 size=1048576 [system.cpu_cluster.l2.tags.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.toL2Bus] type=CoherentXBar children=power_state snoop_filter clk_domain=system.cpu_cluster.clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 header_latency=1 max_outstanding_snoops=512 max_routing_table_size=512 point_of_coherency=false point_of_unification=true power_model= power_state=system.cpu_cluster.toL2Bus.power_state response_latency=1 snoop_filter=system.cpu_cluster.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false width=64 cpu_side_ports=system.cpu_cluster.cpus.icache.mem_side system.cpu_cluster.cpus.dcache.mem_side system.cpu_cluster.cpus.mmu.itb_walker.port system.cpu_cluster.cpus.mmu.dtb_walker.port system.cpu_cluster.cpus.mmu.stage2_itb_walker.port system.cpu_cluster.cpus.mmu.stage2_dtb_walker.port mem_side_ports=system.cpu_cluster.l2.cpu_side [system.cpu_cluster.toL2Bus.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.cpu_cluster.toL2Bus.snoop_filter] type=SnoopFilter eventq_index=0 lookup_latency=0 max_capacity=8388608 system=system [system.cpu_cluster.voltage_domain] type=VoltageDomain eventq_index=0 voltage=1.2 [system.dvfs_handler] type=DVFSHandler domains= enable=false eventq_index=0 sys_clk_domain=system.clk_domain transition_latency=100000000 [system.mem_ctrls0] type=MemCtrl children=dram power_state clk_domain=system.clk_domain command_window=10000 disable_sanity_check=false dram=system.mem_ctrls0.dram eventq_index=0 mem_sched_policy=frfcfs min_reads_per_switch=16 min_writes_per_switch=16 power_model= power_state=system.mem_ctrls0.power_state qos_policy=Null qos_priorities=1 qos_priority_escalation=false qos_q_policy=fifo qos_requestors= qos_syncro_scheduler=false qos_turnaround_policy=Null static_backend_latency=10000 static_frontend_latency=10000 system=system write_high_thresh_perc=85 write_low_thresh_perc=50 port=system.membus.mem_side_ports[0] [system.mem_ctrls0.dram] type=DRAMInterface children=power_state IDD0=0.055 IDD02=0.0 IDD2N=0.032 IDD2N2=0.0 IDD2P0=0.0 IDD2P02=0.0 IDD2P1=0.032 IDD2P12=0.0 IDD3N=0.038 IDD3N2=0.0 IDD3P0=0.0 IDD3P02=0.0 IDD3P1=0.038 IDD3P12=0.0 IDD4R=0.157 IDD4R2=0.0 IDD4W=0.125 IDD4W2=0.0 IDD5=0.23500000000000001 IDD52=0.0 IDD6=0.02 IDD62=0.0 VDD=1.5 VDD2=0.0 activation_limit=4 addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 beats_per_clock=2 burst_length=8 clk_domain=system.clk_domain conf_table_reported=true data_clock_sync=false device_bus_width=8 device_rowbuffer_size=1024 device_size=536870912 devices_per_rank=8 dll=true enable_dram_powerdown=false eventq_index=0 image_file= in_addr_map=true kvm_map=true max_accesses_per_row=16 null=false page_policy=open_adaptive power_model= power_state=system.mem_ctrls0.dram.power_state range=0:536870912:0:128 ranks_per_channel=2 read_buffer_size=32 tAAD=1250 tBURST=5000 tBURST_MAX=5000 tBURST_MIN=5000 tCCD_L=0 tCCD_L_WR=0 tCK=1250 tCL=13750 tCS=2500 tCWL=13750 tPPD=0 tRAS=35000 tRCD=13750 tRCD_WR=13750 tREFI=7800000 tRFC=260000 tRP=13750 tRRD=6000 tRRD_L=0 tRTP=7500 tRTW=2500 tWR=15000 tWTR=7500 tWTR_L=7500 tXAW=30000 tXP=6000 tXPDLL=0 tXS=270000 tXSDLL=0 two_cycle_activate=false write_buffer_size=64 writeable=true [system.mem_ctrls0.dram.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.mem_ctrls0.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.mem_ctrls1] type=MemCtrl children=dram power_state clk_domain=system.clk_domain command_window=10000 disable_sanity_check=false dram=system.mem_ctrls1.dram eventq_index=0 mem_sched_policy=frfcfs min_reads_per_switch=16 min_writes_per_switch=16 power_model= power_state=system.mem_ctrls1.power_state qos_policy=Null qos_priorities=1 qos_priority_escalation=false qos_q_policy=fifo qos_requestors= qos_syncro_scheduler=false qos_turnaround_policy=Null static_backend_latency=10000 static_frontend_latency=10000 system=system write_high_thresh_perc=85 write_low_thresh_perc=50 port=system.membus.mem_side_ports[1] [system.mem_ctrls1.dram] type=DRAMInterface children=power_state IDD0=0.055 IDD02=0.0 IDD2N=0.032 IDD2N2=0.0 IDD2P0=0.0 IDD2P02=0.0 IDD2P1=0.032 IDD2P12=0.0 IDD3N=0.038 IDD3N2=0.0 IDD3P0=0.0 IDD3P02=0.0 IDD3P1=0.038 IDD3P12=0.0 IDD4R=0.157 IDD4R2=0.0 IDD4W=0.125 IDD4W2=0.0 IDD5=0.23500000000000001 IDD52=0.0 IDD6=0.02 IDD62=0.0 VDD=1.5 VDD2=0.0 activation_limit=4 addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 beats_per_clock=2 burst_length=8 clk_domain=system.clk_domain conf_table_reported=true data_clock_sync=false device_bus_width=8 device_rowbuffer_size=1024 device_size=536870912 devices_per_rank=8 dll=true enable_dram_powerdown=false eventq_index=0 image_file= in_addr_map=true kvm_map=true max_accesses_per_row=16 null=false page_policy=open_adaptive power_model= power_state=system.mem_ctrls1.dram.power_state range=0:536870912:1:128 ranks_per_channel=2 read_buffer_size=32 tAAD=1250 tBURST=5000 tBURST_MAX=5000 tBURST_MIN=5000 tCCD_L=0 tCCD_L_WR=0 tCK=1250 tCL=13750 tCS=2500 tCWL=13750 tPPD=0 tRAS=35000 tRCD=13750 tRCD_WR=13750 tREFI=7800000 tRFC=260000 tRP=13750 tRRD=6000 tRRD_L=0 tRTP=7500 tRTW=2500 tWR=15000 tWTR=7500 tWTR_L=7500 tXAW=30000 tXP=6000 tXPDLL=0 tXS=270000 tXSDLL=0 two_cycle_activate=false write_buffer_size=64 writeable=true [system.mem_ctrls1.dram.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.mem_ctrls1.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.membus] type=CoherentXBar children=power_state snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 header_latency=1 max_outstanding_snoops=512 max_routing_table_size=512 point_of_coherency=true point_of_unification=true power_model= power_state=system.membus.power_state response_latency=2 snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false width=16 cpu_side_ports=system.system_port system.cpu_cluster.l2.mem_side mem_side_ports=system.mem_ctrls0.port system.mem_ctrls1.port [system.membus.power_state] type=PowerState clk_gate_bins=20 clk_gate_max=1000000000000 clk_gate_min=1000 default_state=UNDEFINED eventq_index=0 leaders= possible_states= [system.membus.snoop_filter] type=SnoopFilter eventq_index=0 lookup_latency=1 max_capacity=8388608 system=system [system.voltage_domain] type=VoltageDomain eventq_index=0 voltage=3.3 [system.workload] type=ArmEmuLinux eventq_index=0 remote_gdb_port=#7000 wait_for_remote_gdb=false