Adding scripts, commands, and logging scaffolding

This commit is contained in:
Carlos Gutierrez
2025-10-05 03:14:07 +00:00
parent b467587a8b
commit 2b57610f3b
8 changed files with 231 additions and 21 deletions

View File

@@ -107,3 +107,93 @@ RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:54:08 AM UTC 2025 Sun Oct 5 02:54:08 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:58:46 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:58:52 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:59:13 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:59:13 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 02:59:17 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 03:02:57 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 03:03:01 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 03:10:44 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 03:10:50 AM UTC 2025
==== env ====
ROOT=/home/carlos/projects/gem5
SRC=/home/carlos/projects/gem5/gem5src/gem5
GEM5_BIN=/home/carlos/projects/gem5/build/ARM/gem5.opt
CFG=/home/carlos/projects/gem5/iot/scripts/hetero_big_little.py
RUN=/home/carlos/projects/gem5/gem5-run
OUT_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/results
LOG_DATA=/home/carlos/projects/gem5/gem5-data/SmartEdgeAI/logs
Sun Oct 5 03:13:09 AM UTC 2025

View File

@@ -0,0 +1,3 @@
workload,core,dvfs,l2,drowsy,sim_seconds,ipc,cycles,insts,l2_miss_rate
tinyml,kws,big,1MB,0,,,,,
tinyml,kws,big,512kB,0,,,,,
1 workload core dvfs l2 drowsy sim_seconds ipc cycles insts l2_miss_rate
1 workload core dvfs l2 drowsy sim_seconds ipc cycles insts l2_miss_rate
2 tinyml kws big 1MB 0
3 tinyml kws big 512kB 0

99
scripts/hetero_big_little.py Executable file → Normal file
View File

@@ -1,32 +1,95 @@
# Simple heterogeneous big.LITTLE configuration for SmartEdgeAI # scripts/hetero_big_little.py
import m5 # Minimal SmartEdgeAI heterogeneous ARM system
# Supports --cmd, --mem, --l2, --dvfs, and --drowsy
# Generates valid stats.txt for all workloads
import argparse, m5
from m5.objects import * from m5.objects import *
system = System() # -------------------------------
system.clk_domain = SrcClockDomain(clock="1GHz", voltage_domain=VoltageDomain()) # Argument parsing
system.mem_mode = "timing" # -------------------------------
system.mem_ranges = [AddrRange("512MB")] ap = argparse.ArgumentParser()
ap.add_argument("--cmd", required=True)
ap.add_argument("--mem", default="16GB")
ap.add_argument("--l2", default="1MB")
ap.add_argument("--dvfs", choices=["high","low"], default="high")
ap.add_argument("--drowsy", type=int, choices=[0,1], default=0)
args = ap.parse_args()
# two LITTLE + one BIG # -------------------------------
system.cpu = [TimingSimpleCPU(cpu_id=i) for i in range(3)] # Clock & Voltage (DVFS)
# -------------------------------
v = VoltageDomain(voltage="1.0V" if args.dvfs == "high" else "0.8V")
clk = "2GHz" if args.dvfs == "high" else "1GHz"
system = System(
clk_domain=SrcClockDomain(clock=clk, voltage_domain=v),
mem_mode="timing",
mem_ranges=[AddrRange(args.mem)]
)
# -------------------------------
# CPU cluster: 1 big + 2 little
# -------------------------------
big = O3CPU(cpu_id=0)
little1 = TimingSimpleCPU(cpu_id=1)
little2 = TimingSimpleCPU(cpu_id=2)
system.cpu = [big, little1, little2]
# -------------------------------
# Cache hierarchy
# -------------------------------
class L1I(Cache): size = "32kB"
class L1D(Cache): size = "32kB"
class L2(Cache): size = args.l2
system.l2bus = L2XBar()
for c in system.cpu:
c.icache = L1I()
c.dcache = L1D()
c.icache.cpu_side = c.icache_port
c.dcache.cpu_side = c.dcache_port
c.icache.mem_side = system.l2bus.slave
c.dcache.mem_side = system.l2bus.slave
system.l2 = L2()
system.membus = SystemXBar() system.membus = SystemXBar()
system.l2.cpu_side = system.l2bus.master
system.l2.mem_side = system.membus.slave
for cpu in system.cpu: # -------------------------------
cpu.icache_port = system.membus.slave # Drowsy cache behavior
cpu.dcache_port = system.membus.slave # -------------------------------
if args.drowsy:
system.l2.tag_latency = 24
system.l2.data_latency = 24
system.system_port = system.membus.slave # -------------------------------
# Memory controller
# -------------------------------
system.mem_ctrl = DDR3_1600_8x8() system.mem_ctrl = DDR3_1600_8x8()
system.mem_ctrl.range = system.mem_ranges[0] system.mem_ctrl.range = system.mem_ranges[0]
system.mem_ctrl.port = system.membus.master system.mem_ctrl.port = system.membus.master
system.system_port = system.membus.slave
system.workload = SEWorkload.init_compatible("hello") # -------------------------------
for cpu in system.cpu: # Workload setup
cpu.workload = system.workload # -------------------------------
cpu.createThreads() proc = Process()
proc.executable = args.cmd
proc.cmd = [args.cmd]
system.workload = SEWorkload.init_compatible(args.cmd)
for c in system.cpu:
c.workload = proc
c.createThreads()
# -------------------------------
# Instantiate and simulate
# -------------------------------
root = Root(full_system=False, system=system) root = Root(full_system=False, system=system)
m5.instantiate() m5.instantiate()
print("=== SmartEdgeAI big.LITTLE configuration loaded ===") print("[SmartEdgeAI] Starting simulation...")
exit_event = m5.simulate() exit_event = m5.simulate()
print("Exit:", exit_event.getCause()) print(f"[SmartEdgeAI] Exiting @ tick {m5.curTick()} because {exit_event.getCause()}")

View File

@@ -0,0 +1,32 @@
# Simple heterogeneous big.LITTLE configuration for SmartEdgeAI
import m5
from m5.objects import *
system = System()
system.clk_domain = SrcClockDomain(clock="1GHz", voltage_domain=VoltageDomain())
system.mem_mode = "timing"
system.mem_ranges = [AddrRange("512MB")]
# two LITTLE + one BIG
system.cpu = [TimingSimpleCPU(cpu_id=i) for i in range(3)]
system.membus = SystemXBar()
for cpu in system.cpu:
cpu.icache_port = system.membus.slave
cpu.dcache_port = system.membus.slave
system.system_port = system.membus.slave
system.mem_ctrl = DDR3_1600_8x8()
system.mem_ctrl.range = system.mem_ranges[0]
system.mem_ctrl.port = system.membus.master
system.workload = SEWorkload.init_compatible("hello")
for cpu in system.cpu:
cpu.workload = system.workload
cpu.createThreads()
root = Root(full_system=False, system=system)
m5.instantiate()
print("=== SmartEdgeAI big.LITTLE configuration loaded ===")
exit_event = m5.simulate()
print("Exit:", exit_event.getCause())

View File

@@ -14,7 +14,10 @@
│   ├── fig_tinyml_edp.png │   ├── fig_tinyml_edp.png
│   ├── summary.csv │   ├── summary.csv
│   ├── summary_energy.csv │   ├── summary_energy.csv
│   ── tinyml_kws_big_high_l21MB_d0 │   ── tinyml_kws_big_high_l21MB_d0
│   │   └── stats.txt
│   └── tinyml_kws_big_high_l2512kB_d0
│   └── stats.txt
├── scripts ├── scripts
│   ├── build_gem5.sh │   ├── build_gem5.sh
│   ├── bundle_logs.sh │   ├── bundle_logs.sh
@@ -23,6 +26,7 @@
│   ├── env.sh │   ├── env.sh
│   ├── extract_csv.sh │   ├── extract_csv.sh
│   ├── hetero_big_little.py │   ├── hetero_big_little.py
│   ├── hetero_big_little.py.bak
│   ├── plot_edp_tinyml.py │   ├── plot_edp_tinyml.py
│   ├── plot_epi.py │   ├── plot_epi.py
│   ├── run_one.sh │   ├── run_one.sh
@@ -30,7 +34,7 @@
│   └── tinyml_kws.sh │   └── tinyml_kws.sh
└── tree.log └── tree.log
7 directories, 24 files 8 directories, 27 files
../gem5-data/SmartEdgeAI ../gem5-data/SmartEdgeAI
├── logs ├── logs
│   ├── tinyml_kws_big_high_l21MB_d0.stderr.log │   ├── tinyml_kws_big_high_l21MB_d0.stderr.log
@@ -40,6 +44,8 @@
└── results └── results
├── summary.csv ├── summary.csv
├── tinyml_kws_big_high_l21MB_d0 ├── tinyml_kws_big_high_l21MB_d0
│   └── stats.txt
└── tinyml_kws_big_high_l2512kB_d0 └── tinyml_kws_big_high_l2512kB_d0
└── stats.txt
5 directories, 5 files 5 directories, 7 files

16
workloads/tinyml_kws.c Normal file
View File

@@ -0,0 +1,16 @@
#include <stdio.h>
#include <math.h>
int main() {
printf("[tinyml_kws] Starting simulated inference workload...\n");
volatile double sum = 0.0;
for (int i = 0; i < 20000000; i++) {
sum += sin(i * 0.001) * cos(i * 0.002);
if (i % 5000000 == 0) {
printf("[tinyml_kws] progress: %d iterations\n", i);
}
}
printf("[tinyml_kws] Done! sum=%f\n", sum);
return 0;
}